Neuro-inspired computing architectures are one of the leading candidates to solve complex and large-scale associative learning problems for AI applications. The two key building blocks for neuromorphic computing are the neuron and the synapse, which form the distributed computing and memory units. In the NeurONN project, we are proposing a novel neuro-inspired computing architecture where information is encoded in the “phase” of coupled oscillating neurons or oscillatory neural networks (ONN).

Specifically, VO2 metal-insulator transition (MIT) devices and 2D memristors will be developed as neurons and synapses for hardware implementations. We predict VO2 MIT devices are up to 250X more energy efficient than state of the art digital CMOS based oscillators, where 2D memristors are up to 330X more energy efficient than state of the art TiO2 memristors. Moreover, the predicted energy efficiency gains of ONN architecture vs state of the art spiking neural network (SNN) architecture is up to 40X.

Thus, NeurONN will showcase a novel and alternative energy efficient neuromorphic computing paradigm based on energy efficient devices and architectures. Such ONN will demonstrate synchronization and coupling dynamics for establishing collective learning behavior, in addition to desirable characteristics such as scaling, ultra-low power computation, and high computing performance.

NeurONN aims to develop the first-ever ONN hardware platform (targeting two demonstrators) and complete with an ONN design methodology toolbox covering aspects from ONN architecture design to algorithms in order to facilitate adoption, testing and experimentation of ONN demonstrator chips by all potential users to unleash the potential of ONN technology.

WP1 | Novel Computing Devices and Circuits | Leader: IBM Research Zurich

In the work package, the goal is to develop the fabrication and process steps for the artificial neurons and synapses. Novel computing devices and circuits for an alternative computing paradigm such as insulator-metal transition VO2 devices for emulating oscillating neurons and 2D MoS2 memristor devices for emulating synaptic weights will be developed.

WP2 | Design-Technology Assessment | Leader: SIL

The objective of this work package is to develop simulation flow starting from atomistic models and modeling all the way to compact model extraction procedure: Ab initio – TCAD – SPICE computational flow. The software flow shall capture all relevant material, device and circuit information and parameters.

WP3 | Architecture & Design Space Exploration | Leader: CNRS

In this work package, we develop advanced design methods for ONN implementation using novel computing devices such as MIT VO2 and 2D MoS2 memristor devices. The cooperating partners will investigate the rich dynamics of oscillating devices and how that can be exploited to obtain energy efficient ONN while high accuracy for pattern recognition applications.

WP4 | Demonstrators and Use Cases | Leader: CSIC

The objectives of this work package are on developing ONN architecture demonstrators based on the novel devices developed in WP1 and architecture concepts developed in WP3.

WP5 | Dissemination and Exploitation | Leader: FHG

This work package aims to ensure that the NeurONN project has a high impact. To ensure this, we provide effective communication to the public and scientific community, disseminate to appropriate stakeholder groups, to obtain inputs, feedback and requirements from potential stakeholders (industry, end users) for the final integrated system.

WP6 | Project Management | Leader: CNRS

The objective of this work package is to ensure that the project meets its objectives within budget and scheduled timescales. Tasks will include monitoring project progress, tracking deliverables and reporting back to the Consortium.